1. Field of the Invention
The present invention relates to the field of semiconductor integrated circuit (IC) manufacturing, and more specifically, to a method of forming raised contacts for a substrate.
2. Discussion of Related Art
In 1965, Gordon Moore first observed that the number of transistors per unit area on a chip appeared to double approximately every 18 months. Ever since then, the semiconductor industry has managed to introduce new designs and processes on schedule to deliver the improvement in device density projected by the so-called Moore""s Law. In particular, major enhancements in optics and photolithography have reduced the critical dimension (CD) that can be successfully patterned in the features on a chip or other substrate. At the same time, significant improvements in doping, deposition, and etch have decreased the concentration, depth, and thickness that can be precisely achieved across the substrate.
As device dimensions approach atomic dimensions, the fundamental limitations of physics will play increasingly larger roles in determining the performance and reliability of the devices on the substrate. In the past, issues of scaling have generally involved either the transistor in the front-end of semiconductor processing or the wiring in the back-end of semiconductor processing. However, it is becoming increasingly important to balance the scaling of the transistor and the interconnect on the substrate with the scaling of the interconnection between multiple substrates.
Thus, what is needed is a method of forming raised contacts for interconnection between substrates and a structure having such raised contacts.